专利摘要:
A computing system comprising a plurality of islands operable in one or more modes of operation, a first island coupled to a first island control circuit (124) and a second island coupled to a second island control circuit (126); a first mediation circuit (128, 132, 130) coupled to the first and second island control circuits (124, 126) and adapted to receive a first request of the first island control circuit (124) for changing a mode current operation of the first island; receiving a second request from the second island control circuit (126) to change a current operating mode of the second island; and controlling a supply circuit of a first voltage and / or a first clock generator (108, 110, 112) for modifying a voltage and / or clock signal supplied to the first and second islands based on the first and second queries.
公开号:FR3043476A1
申请号:FR1560630
申请日:2015-11-05
公开日:2017-05-12
发明作者:Olivier Monfort；Lionel Jure；Gauthier Reveret；Sebastien Genevey
申请人:Dolphin Integration SA；
IPC主号:

专利说明:

SYSTEM AND METHOD FOR FEED MANAGEMENT
Field
The present disclosure relates to the field of power management and clock distribution systems in one or more integrated circuits.
Statement of Prior Art
For efficiency of power consumption, it has been proposed to allow certain regions of an integrated circuit to operate in one or more different modes of operation chosen on the basis of performance requirements at a given time. For example, a high or low supply voltage and a high or low frequency clock signal may be selected depending on whether the circuit region should have high performance or low power. These regions of the circuit are often referred to in the "island" technique.
All the circuits of a given island are for example fed by common resources. For example, each of the islands receives a common supply voltage and / or reference voltage and a common clock signal. In some cases, each island includes a dedicated voltage regulator to supply its supply voltage and a dedicated clock generator to provide its clock signal. In this way, the supply voltage and the clock signal of each island can be controlled independently of the other islands.
When a given island must change its operating mode, for example to enter a state of low consumption, a command is for example transmitted to the island to trigger a sequence of operations to implement the change of operating mode. These operations include for example a memorization of certain data and a drop in power of various circuits of the island in a given order. The resources supplying the island such as a power supply circuit and a clock generator are also controlled to bring the power supply voltage and the island clock signal to given values.
The consumption and clock management of the islands is often carried out centrally, for example by an activity control module able to communicate with each island and the voltage regulator and the associated clock generator. However, such a solution has technical disadvantages in terms of complexity and adaptability. In fact, if a new island is added to a given system design, this may require significant changes to the activity control module to accommodate the new power and clock management requirements of the new island. In addition, providing a voltage regulator and a clock generator for each island leads to high chip areas occupied by these components and high consumption.
There is therefore a need in the art for an improved energy and clock management system in a computing system. SUMMARY It is an object of embodiments of the present disclosure to at least partially address one or more of the needs of the prior art.
According to one aspect, there is provided a computing system comprising: a plurality of islands, each island comprising a group of circuits adapted to operate in one or more modes of operation, wherein in a first modes of operation the circuits of islands are adapted to receive a first voltage and / or a first clock signal at a first frequency, and in a second one of the operating modes, the island circuits are adapted to receive a second voltage different from the first voltage and / or a second clock signal at a second frequency different from the first frequency, a first one of the islands being coupled to a first island control circuit and a second one of the islands being coupled to a second island control circuit; a first mediation circuit coupled to the first and second island control circuits and adapted to receive a first request from the first island control circuit for modifying a current operating mode of the first island; receiving a second request from the second island control circuit to modify a current operating mode of the second island; and - controlling a supply circuit of a first voltage and / or a first clock generator for modifying a voltage and / or clock signal supplied to the first and second islands based on the first and second requests.
According to one embodiment, the first and second island control circuits are coupled via an island control bus to one or more operating mode control circuits, wherein the first and second circuit circuits control units are adapted to produce the first and second requests respectively on the basis of a mode change request transmitted by the one or more operating mode control circuits.
According to one embodiment, the computing system comprises another bus coupled to each of the first and second islands and providing a data link between the islands, wherein the island control bus is dedicated to mode control communications. Operating.
According to one embodiment, the computing system further comprises a second mediation circuit coupled to the first mediation circuit and a second resource adapted to provide a first voltage level to the supply circuit of a first voltage or the first clock generator; or a first clock signal to the first clock generator, wherein the second mediation circuit is adapted to receive a request from the first mediation circuit to change the mode of operation of the second resource.
According to one embodiment, the first mediation circuit is adapted to control the supply circuit of a first voltage and / or the first clock generator to modify a voltage level signal and / or clock supplied to the first and second islands to values compatible with the first and second requests.
According to one embodiment, the first island is formed on a first integrated circuit and at least one of: the second island; the supply voltage circuit; and the clock generator is formed on a second integrated circuit.
According to one embodiment, the computing system further comprises a domain link controller (DLC) circuit coupled to the first and second island control circuits via an island control bus; and one or more operating mode control circuits for controlling the operating modes of the first and second islands via the first and second island control circuits.
According to one embodiment, the operating mode control circuit (s) comprise a first operating mode control circuit executing a mode switching program; and a second operating mode control circuit coupled to the DLC circuit and adapted to control the operating modes of the first and second islands when the first operating mode control circuit is not available.
According to one embodiment, the first island control circuit is coupled to the first island by a plurality of control lines providing one or more control signals to control a change of operating mode of the first island; and the second island control circuit is coupled to the second island by a plurality of control lines providing one or more control signals for controlling a change of operating mode of the second island.
According to one embodiment, there is provided a method comprising: receiving by a first mediation circuit coupled to first and second island control circuits a first request from the first island control circuit to modify a mode of current operation of a first island; receiving via the first mediation circuit coupled to the first and second island control circuits a second request from the second island control circuit for modifying a current operating mode of a second island, wherein first island control circuit is coupled to a first island, the second island control circuit is coupled to a second island and each of the first and second islands comprises a circuit group adapted to operate in one of a plurality of islands. plurality of modes of operation, wherein in a first one of the operating modes the island circuits receive a first voltage and / or a first clock signal at a first frequency and in a second mode the circuits the island receives a second voltage different from the first voltage and / or a second clock signal at a second frequency different from the first frequency; and controlling by the first mediation circuit a supply first voltage supply circuit and / or a first clock generator for supplying the first or second voltage and / or the first or second clock signal to the first and second Islets on the basis of the first and second requests.
Brief description of the drawings
These and other features and advantages will become apparent upon reading the following detailed description of embodiments, given by way of example and not limitation in relation to the accompanying drawings in which: FIG. schematically a calculation system according to an exemplary embodiment; FIG. 2 diagrammatically and in more detail a mediator dependency module of FIG. 1 according to an exemplary embodiment; FIG. 3 diagrammatically represents a voltage and clock management circuit according to an exemplary embodiment of the present description; FIG. 4 is a state diagram representing the states of the dependency module of FIG. 1 according to an exemplary embodiment; Fig. 5 is a flowchart illustrating steps of a method of mediating between power change and / or clock rate requests according to an exemplary embodiment; Fig. 6 is a state diagram showing states of an island control module of Fig. 1 according to an exemplary embodiment; FIG. 7 schematically represents an interface between an island control module and an island of FIG. 1 according to an exemplary embodiment; and Figure 8 schematically shows a part of the calculation system of Figure 1 in the case of implementation on two integrated circuits.
detailed description
FIG. 1 schematically represents a calculation system 100 according to an exemplary embodiment. The computing system 100 may be a system-on-a-chip (SoC), or a plurality of integrated circuit chips. The system 100 comprises a plurality of islands. In the example of FIG. 1, there are three islands (ISLAND1, ISLAND2, ISLAND3) referenced 102, 104 and 106 but, in alternative embodiments, there could be any number of islands.
Each of the islands 102, 104, 106 corresponds to a group of circuits which share a common supply and / or reference voltage and / or a common clock signal. While the supply voltage is a voltage used to power the island, a voltage reference is for example a voltage level used as a reference by one or more analog circuits of the island. Although the voltage and clock supplied to the islands are common, each island includes, for example, input switches allowing one or more of the signals to be cut off independently in each island.
Each of the islands 102, 104, 106 may for example operate in one of a plurality of modes of operation. Each operating mode corresponds, for example, to a particular combination of parameters relating to the supply and / or reference voltage, the clock frequency and the consumption state of the circuit. For example, the operating mode could correspond to a high performance mode in which the supply voltage and the clock frequency are at relatively high levels. Another mode of operation could correspond to a low power mode of rest in which the supply voltage is at relatively low level just enough to ensure a maintenance of the data, the clock signal is maintained, but blocked by the island , so that the island can be restarted quickly.
The calculation system 100 comprises for example one or more voltage regulators (REG) for supplying the supply voltages to the islands. In the example of FIG. 1, the calculation system comprises two voltage regulators 108 and 110. As is shown in solid lines, the voltage regulator 108 supplies, for example, a supply voltage to the island 102 and the For example, voltage regulator 110 supplies a supply voltage to islands 104 and 106. Each of the voltage regulators 108, 110 includes, for example, one or more circuits including current and voltage sources for producing a supply voltage and / or or a power selection switch for selecting between a plurality of voltage regulators.
The computing system 100 also includes one or more clock generators (CLK GEN). In the example of FIG. 1, the calculation system 100 comprises a single clock generator 112. As shown in dashed lines in FIG. 1, the clock generator 112 supplies, for example, a clock signal common to each islands 102, 104, 106. For example, the clock generator 112 comprises one or more of: a crystal oscillator; a frequency divider; a frequency lock loop; a phase locked loop; a delay lock loop; an integrated oscillator such as an RC oscillator (resistance-capacitance); a ring oscillator; and / or other circuits capable of generating a clock signal.
Although not shown in FIG. 1, the computing system 100 may include one or more other resources in addition to or instead of the voltage regulators 108, 110 and the clock generator 112. Calculation 100 may include other types of voltage supply circuits such as a reference voltage supply circuit.
The computing system 100 comprises for example a data communication bus 114 providing a data link between the various circuits of the islands 102, 104 and 106.
In addition to the data bus 114, an island control bus 116 is for example provided for power management and clock purposes. The bus 116 is for example coupled to an island control module (ICU) associated with each island, the ICUs of the islands 102, 104, 106 being respectively referenced 122, 124 and 126. Each ICU 122, 124, 126 is by example coupled to the corresponding island 102, 104, 106 and provides for example control signals to control the power and clock status of the island.
A dependency mediator module (DMU) is for example associated with each resource, for example with each voltage regulator and with each clock generator of the calculation system 100 of FIG. 1. For example, the voltage regulators 108 and 110 are associated with the DMUs 128 and 130, respectively, and the clock generator is associated with a DMU 132. Each of the ICUs 122, 124, 126 is for example coupled to the DMU of the voltage regulator supplying the supply voltage to its island. connected to the DMU of the clock generator supplying the clock signal to its connected island. Thus, in the example of FIG. 1, the ICU 122 of the island 102 is coupled to the DMUs 128 and 132 and the ICUs 124 and 126 of the island 104 and 106 are coupled to two of the CMUs 130 and 132. In the embodiment of FIG. 1, the interface between the DMUs 128, 130, 132 and the ICUs 122, 124, 126 is provided by a plurality of dedicated communication wires. However, in alternative embodiments, these communications could be carried out using the bus 116.
For example, a domain link controller (DLC) 134 is coupled to the bus 116 and is arbitrated, for example, between the power management commands produced by a mode switching program (MSP) 136 and by an offset control module (SCU). ) 138.
The MSP 136 is for example implemented in the island 102 although, in alternative embodiments, it can be implemented elsewhere in the calculation system 100. The MSP 138 controls for example the modes of operation of the islands by By way of example, the MSP 138 stores a list indicating a current power state and operating mode of each of the islands. The MSP 136 can thus coordinate transitions between the operating modes of the islands 102, 104, 106. The MSP 136 is for example a program, loaded for example in an instruction memory and executed by a microprocessor of the island 102 ( not shown in Figure 1). When the instructions of the MSP are executed by the microprocessor, they allow the implementation of functions of the MSP 136 described in more detail below.
The SCU 138 is for example a circuit adapted to provide power management when the MSP 136 can not fulfill this role, for example because its power supply has been lowered. For example, the MSP controls a start sequence, a wake-up sequence, and an entry into a sleep mode of the computing system 100 when the MSP is in a sleep mode or unavailable for some other reason. For example, it is also responsible for a restart sequence of the MSP 136, for example by controlling the order in which the various components of the MSP are turned on, thereby preventing the system from entering an undesired state from which it could not. not go out.
The DLC 134 is for example adapted to receive commands from the MSP 136 and the SCU 138. The DLC 134 for example communicates with the MSP 136 via the data bus 114 and can communicate with the SCU 138 via a dedicated link represented in FIG. 1 by an arrow between the SCU 138 and the DLC 134, or by means of the bus 116. The DLC 134 for example provides an interface between the MSP 136 or the SCU 138 and the bus 116 by translating the commands received from the MSP 136 or SCU 138 in commands that can be transmitted on the bus 116 to the ICUs using a particular bus protocol applied to the bus 116. The DLC 134 also translates, for example, feedback signals received on the bus 116 from the ICU so that information is accessible by the MSP 136 or the SCU 138. In addition, the DLC 134 is for example adapted to allow the MSP 136 to control the power management circuit whenever it is able to do so. , and otherwise to authorize e SCU 138 to control the power management circuit.
A wakeup interrupt module (WIU) 140 is for example coupled to the SCU 138 although, in alternative embodiments, it can be coupled to one of the ICUs 122, 124, 126. The WIU 140 is for example a circuit adapted to handle interruptions that cause ion or more of the islands 102, 104, 106 to be awake. The WIU 140 does this by, for example, identifying the origin of each interrupt, saving each interrupt until the island (s) concerned can process it, and transmitting it to the island (s) concerned 'as soon as they have been awake and can process the interruption.
In operation, the MSP 136 is for example adapted to modify the mode of operation of one or more of the islands 102, 104, 106 by transmitting on the bus 116 an appropriate command to the corresponding ICU 122, 124 and / or 126, for example via the DLC 134. The ICUs receiving this order process it for example locally and determine the appropriate sequence of changes in the power state, the supply voltage and / or the clock signal. island connected to achieve the desired operating mode change. Each ICU then sends a request to the DMU associated with its voltage regulator and / or the DMU associated with its clock generator, requiring the corresponding changes. If the DMU can make the required changes, it controls for example the voltage regulator / clock generator accordingly and confirms to the ICU that the request has been satisfied. The ICU then informs, for example, the MSP 136 that the change has been successfully made so that the MSP 136 can update its operating mode record of the corresponding ICU. In the case where the voltage regulator and / or the clock generator feed more than one ion island, the DMU arbitrates for example between requests from each of the islands and selects or maintains the supply voltage and / or the clock signal that satisfies a minimum requirement of each of the islands.
In one embodiment, each of the islands 102, 104, 106 allows at least some of the following 16 modes of operation where V is the voltage and F the frequency:
Of course, the above table provides only one example of a list of possible modes of operation that has the advantage that any of the modes of operation can be selected using a four-bit order. There are however many sets of alternative modes of operation that could be used with the same number of modes available or another.
Figure 2 shows schematically and in more detail the CMU 130 of Figure 1 according to an example embodiment. The other DMUs 128 and 132 of FIG. 1 are for example implemented in a similar manner.
The DMU 130 comprises for example a mediation circuit (MEDIATION CIRCUIT) 206, which comprises for example an ICU interface (ICU INTERFACE) for communicating with one or more ICUs and a DMU interface (DMU INTERFACE) for communicating with one or more other DMUs. . In the example of Figures 1 and 2, the DMU 130 communicates with the ICUs 124 and 126, although it can communicate further with other ICUs. In addition, in the example of FIG. 2, the DMU 130 communicates with the DMUs 202 and 204.
The DMU 130 also comprises, for example, a control circuit (REG / CLK CTRL CIRCUIT) 208 for communicating with the mediation circuit 206 and with one or more resources (RESOURCE) such as the voltage regulator 110. For example, the circuit The mediation 206 provides the control circuit 208 with mode (MODE) and request (REQ) signals indicating when a mode change is desired, and receives acknowledgment (ACK) and denied request signals from the control circuit 208. (DENIED). For example, the acknowledgment signal is activated by the control circuit 208 when the required mode change can be allowed, while the refused request signal is
for example provided when a resource has not responded after a certain time and thus the request is considered by the mediation circuit 206 as denied.
The control circuit 208 comprises for example a resource interface (CONTROL RESOURCE INTERFACE) enabling it to communicate with a resource such as the voltage regulator 110.
FIG. 3 diagrammatically and in more detail the voltage and clock management circuit associated with the DMU 130 according to an exemplary embodiment. As previously described, the DMU 130 communicates with the ICUs 124 and 126 associated with its powered islands and with the DMUs 202 and 204 associated with its upstream resources. For example, the DMU 202 is associated with a controlled resource (CONTROLLED RESOURCE) 302 and the DMU 204 is associated with a controlled resource (CONTROLLED RESOURCE) 304. For example, the resources 302 and 304 each correspond to a different voltage regulator and the resource 110 corresponds to a power selection switch which selects one of the voltage regulators 302, 304 to supply the supply voltage to the resource 110. When the DMU 130 is to implement a change of operating mode of an island, it may for example require, via the DMU 202 or 204, the upstream resource is controlled accordingly, for example to cut or start the supply voltage.
Fig. 4 is a state diagram showing an example of states and state transitions in each of DMUs 128, 130, 132.
A reset state (RESET) 402 is for example introduced when powering on the DMU, or after any reset operation.
The DMU then enters a state 404 in which it waits for one. request from an ICU.
When a request from an ICU arrives (ICU REQ), the DMU for example makes transitions to a mediation state (MEDIATION) 406. From the mediation state 406, if the required mode is the same as the mode current of the resource or is compatible with it, the acknowledgment signal is returned to the ICU by setting it to a logic state 1 and the CMU then returns to the state 404. However, if in the state 406, the EMU can not satisfy the requested change in mode request (KO), for example, it introduces a state 408, in which a refused signal is returned to the ICU, the request is indicated as pending, and it waits for another ICU request (PENDING - AWAIT ICU REQUEST). If another ICU request arrives, the DMU returns to the mediation state 406 to determine if the request can be satisfied. If, in the mediation state 406, the DMU determines that it can satisfy one or more required mode changes / during s (OK) it introduces a change request state (REQ / CLK CHANGE REQUEST) 410 in which the corresponding resource is ordered in change mode. The DMU then introduces an acknowledgment state 412 in which the acknowledgment signal returned to the ICU is for example set to a logic state 1 and the DMU then returns to the state 404.
Fig. 5 is a flowchart illustrating steps of a method for mediating mode change requests according to an exemplary embodiment. These steps are for example carried out by the mediation circuit 206 and by the control circuit 208 of the DMU described above in relation with FIG. 2. Of course, the flowchart of FIG. 5 is only an example of the way in which the mediation can be implemented by the DMU and variants can be made to this method. It is assumed in the example of FIG. 5 that the resource controlled by the DMU is supplied to at least two islands and thus the DMU is coupled to at least two corresponding ICUs. From a start point 500, at a step 501, a mode change request is received by the DMU of an ICU. At a later step 502, for example, it is determined whether the new required mode is equal to the current mode. If so, an acknowledgment signal can be returned directly to the ICU at a step 504. This occurs, for example, if another ICU has already requested the same change of state and thus the mode has been changed. If, however, the new mode is not the same as the current mode, the next step is step 506. In step 506 it is determined whether the new required mode is compatible with all other current requests. other terms with the modes required by all other islands connected to the resource.
For example, assuming the resource is a voltage regulator and its current mode based on current requests is a low supply voltage, the new mode required may be to increase the voltage to the average supply voltage . Such a request is compatible with the current request, because the islands operating with a low supply voltage can also operate with an average supply voltage. If however the request is to cut the voltage regulator, this request is incompatible with the current requests which require at least the low supply voltage.
If the new mode is not compatible with all the current requests, the new step is for example a step 508 during which a new mode change request is marked as pending, and the ICU is informed accordingly that the request change of mode was refused. Alternatively, if in step 506 the new mode is compatible with all pending requests, the new step is step 510. In step 510, a mode change command is generated and transmitted to the resource under DMU control. At a next step 512, it is determined whether an acknowledgment has been received from the resource, indicating that the required change has been completed. Once the acknowledgment has been received, a step 514 is for example performed during which the acknowledgment is transferred to the ICU from which the request for change of mode originated. The process then ends, for example.
Fig. 6 is a state diagram illustrating an example of states and state transitions in each of the ICUs 122, 124, 126.
A reset state 602 is, for example, introduced when the ICU is powered up or after any reset operation.
A request waiting state DLC (AWAIT DLC REQUEST) 604 is then for example introduced by the ICU and the ICU waits for a change of mode request from the DLC 134, the request coming for example from the MSP 136 or the SCU 138. .
When a request from the MSP or the SCU (MSP / SCU REQ) arrives, a mediation state 606 (MEDIATION) is for example introduced. From this state, two other states 608 and 610 are introduced simultaneously or consecutively. The order in which the states 608 and 610 are introduced depends, for example, on the particular mode change to be implemented. State 608 is a REG / CLK CHANGE REQUEST state during which a request is sent to the DMU of the clock generator and / or the island voltage regulator to change. fashion. The ICU waits for an acknowledgment of receipt of the relevant DMU (s) that the required change has been made. State 610 is an island change request (ISLET CHANGE REQUEST) state, in which the island is required to perform the required mode change. Again, the ICU waits for example an acknowledgment of the island according to which the change of request has been completed.
If the operations performed during each of the states 608, 610 are successful, the ICU for example returns to the mediation state 606 and it is determined that the change has been made successfully. The ICU then informs, for example, the MSP 136 or the UCS 138 that the change has been successfully completed, depending on the circuit that initiated the mode change request. In some embodiments, this is accomplished by activating an interrupt in the DLC 134 that can be detected by the MSP 136 or the SCU 138. Thus, the ICU for example moves to an interrupt setup state (SET IRQ) during which an interrupt is established, for example by setting a bit, associated with the ICU in a register stored by the DLC 134. This register is also accessible by the MSP 136 and SCU 138 and indicates that the change of mode has ended and details of the change of state can be obtained from the ICU. The ICU then returns for example to state 604.
FIG. 7 schematically represents the interface between the ICU 124 and the island 104 according to an exemplary embodiment. The interfaces between the other ICUs and the islands of the calculation system 100 are for example implemented in a similar manner.
As shown, the ICU 124 receives, for example, the clock signal CLK from the clock generator 112 and supplies this clock to the island 104. The ICU 124 comprises, for example, a switch 702 allowing this clock to be blocked. . The ICU 124 also receives for example a PCLK clock signal from the bus 116 allowing the data to be received successfully on the bus 116 and a reset signal RST to reset the ICU. The island 104 comprises, for example, a Transition Ramp Cell (TRC) island controller, a circuit portion 704 that can be powered or de-energized (ON / EXT), and a circuit portion 706 that can be powered or de-energized or can introduce a retention state (ON / RET / EXT). For example, the circuit portion 704 is powered by the power supply line of the island through a switch 708 controlled by the inverse signal "RET + EXT" corresponding to the inverse of the OR logic of these signals. Thus, the switch 708 supplies the circuit portion 704 unless the circuit portion needs to be OFF (the EXT signal is ON) or to introduce a low power retention mode (the REQ signal is ON). The circuit portion 706 is for example supplied by the supply voltage line of the island via a switch 710 controlled by the inverse of the signal EXT. Thus, the switch 710 supplies the circuit portion 706 unless the circuit needs to be turned off (the EXT signal is turned on). The interface between the ICU 124 and the island 104 comprises, for example, lines for supplying one or more of the following control signals: one or more clock signal CLK, comprising, for example, the main clock signal of the island powered by the clock generator 132 and, in some embodiments a clock signal for the island controller TRC; - EXT signal mentioned above to control the island in ON or OFF state. In some embodiments, an acknowledgment signal may be provided from the TRC island controller to the ICU to indicate when the island's main power through switch 708 is ready to be used. ; the signal RET mentioned above controlling at least a part of the island to introduce a state of low voltage retention. In some embodiments, an acknowledgment signal may be provided from the TRC island controller to the ICU indicating that the island's retention power through the switch 710 is ready for use. ; one or more status signals (PWR) for controlling the transitions between power states of the island. For example, these signals include signals for controlling the current limit and ON / OFF sequence delay of the island and hold signals for controlling the retention components to hold the data before a break or to restore data after a power up; a POK signal from the island to the ICU confirming that a change in the power state of the island has been effected; one or more reset signals RST. For example, the reset signals may include a signal to reset the island controller TRC, a signal to reset one or more registers in the island that remain switched on during the mode. retention, and a signal for resetting one or more registers in the island that are cut during the retention mode; and one or more ISO isolation signals for isolating one or more inputs or outputs if the island is preparing to enter the power failure or retention mode.
FIG. 8 diagrammatically represents the islands 104, 106 and resources 110, 112 of FIG. 1 in the case where the island 104 and the clock generator 112 are formed on a single integrated circuit (IC) 802, and island 106 and the voltage regulator 110 are formed on another integrated circuit (IC) 804. As shown, the clock line carrying the clock signal produced by the clock generator 112 passes for example from the IC 802 to IC 804 by pads or connection pins 806 and 808 of circuits 802 and 804 respectively. Similarly, the supply voltage line from the voltage regulator 110 passes, for example, from IC 804 to IC 802 by connection pads 810 and 812 of circuits 804 and 802, respectively. The communication interfaces between the ICUs and the DMUs between the IC 802 and 804 are for example transferred by a serial interface between the IC 802, 804. For example, the ICU 824 and the DMU 132 of the IC 802 are both coupled by parallel interfaces to a two-way parallel / serial converter 814 of the IC 802, and the ICU 126 and the DMU 130 of the IC 804 are both coupled by parallel interfaces to a parallel-to-serial converter. two lanes 816 of the IC 802. One or more serial interfaces 818 are provided between the converters 814, 816 of the IC 802, 804.
The data bus 114 for example passes from IC 802 to IC 804 via two dual-channel parallel / serial converters 820 and 822 of ICs 802 and 804, respectively, and a serial connection 823 therebetween. Similarly, the island control bus 116 for example switches from IC 802 to IC 804 by two-way parallel / serial converters 824 and 826 of IC 802 and 804 respectively and a connection 827 therebetween.
An advantage of the embodiments described here is that, by decentralizing the resource control (power supply voltage circuit and / or clock generator) to circuits associated with each island and mediating a circuit associated with each resource, the complexity of mode change operations can be significantly reduced. This allows for example 'DVFS (double incrementation of voltage and frequency) to be implemented to switch islands of a high power mode in which they calculate for example at full speed to a low power mode in which they calculate for example at reduced speed. This allows the power consumption of the entire system to be adjusted dynamically at any time based on the actual requirements in terms of computing activity.
Having thus described at least one embodiment by way of illustration, various variations, modifications and improvements will be apparent to those skilled in the art. For example, it will be clear to those skilled in the art that the particular distribution of the components in the computing system 100 between the separate integrated circuits as shown in FIG. 8 is only one example, and that many other configurations would be possible. For example, in some embodiments, all resources and their corresponding DMU could be arranged on a separate integrated circuit of islands 102, 104 and 106.

权利要求:
Claims (10)
[1" id="c-fr-0001]
A computing system comprising: a plurality of islands (102, 104, 106), each island comprising a group of circuits adapted to operate in one or more modes of operation, wherein in a first one of the modes of operation the circuits of the islands are adapted to receive a first voltage and / or a first clock signal at a first frequency, and in a second one of the operating modes, the island circuits are adapted to receive a second voltage different from the first voltage and / or a second clock signal at a second frequency distinct from the first frequency, a first one of the islands being coupled to a first island control circuit (124) and a second one of the islands being coupled to a second control circuit of island (126); a first mediation circuit (128, 132, 130) coupled to the first and second island control circuits (124, 126) and adapted to: receive a first request from the first island control circuit (124) to modify a current operating mode of the first island; receiving a second request from the second island control circuit (126) to modify a current operating mode of the second island; and - controlling a supply circuit of a first voltage and / or a first clock generator (108, 110, 112) for modifying a voltage and / or clock signal supplied to the first and second islands on the basis of first and second queries.
[2" id="c-fr-0002]
The computing system of claim 1, wherein the first and second island control circuits (124,126) are coupled by an island control bus (116) to one or more control mode circuits. operation (136, 138), the first and second island control circuits being adapted to produce the first and second requests respectively on the basis of a mode change request transmitted by the operating mode control circuit (s). (136, 138).
[3" id="c-fr-0003]
A computing system according to claim 2, comprising another bus (114) coupled to each of the first and second islands and providing a data link between the islands, wherein the island control bus (116) is dedicated to operating mode control communications.
[4" id="c-fr-0004]
A computing system according to any one of claims 1 to 3, further comprising a second mediation circuit (202, 204) coupled to the first mediation circuit (128, 130, 132) and a second resource adapted to provide a first voltage level to the supply circuit of a first voltage (108, 110) or the first clock generator (112); or a first clock signal to the first clock generator (112), wherein the second mediation circuit (202, 204) is adapted to receive a request from the first mediation circuit to modify the mode of operation of the second resource .
[5" id="c-fr-0005]
A computing system according to any one of claims 1 to 4, wherein the first mediation circuit (128, 130, 132) is adapted to control the first voltage supply circuit (108, 110) and / or the first clock generator (112) for modifying a voltage and / or clock level signal supplied to the first and second islands to values compatible with the first and second requests.
[6" id="c-fr-0006]
The computing system of any one of claims 1 to 5, wherein the first island (104) is formed on a first integrated circuit and at least one of: the second island (102, 106); the supply voltage circuit (108, 110); and the clock generator (112) is formed on a second integrated circuit.
[7" id="c-fr-0007]
The computing system of any one of claims 1 to 6, further comprising a domain link controller (DLC) circuit (134) coupled to: the first and second island control circuits (124, 126) by an island control bus (116); and one or more operating mode control circuits (136, 138) for controlling the operating modes of the first and second islands by first and second island control circuits (124, 126).
[8" id="c-fr-0008]
The computing system of claim 7, wherein the one or more operating mode control circuitry (136, 138) comprises: a first operating mode control circuit (136) executing a mode switching program (MSP) 136); and a second operating mode control circuit (138) coupled to the DLC circuit (134) and adapted to control the operating modes of the first and second islands when the first operating mode control circuit is not available.
[9" id="c-fr-0009]
The computing system of any one of claims 1 to 8, wherein: the first island control circuit (124) is coupled to the first island (104) by a plurality of control lines providing one or more signals control (PWR, RET, EXT) for controlling a change of operating mode of the first island; and the second island control circuit (126) is coupled to the second island (106) by a plurality of control lines providing one or more control signals (PWR, RET, EXT) for controlling a change in operating mode of the second island.
[10" id="c-fr-0010]
A method comprising: receiving by a first mediation circuit (128, 132, 130) coupled to first and second island control circuits (124, 126) a first request from the first island control circuit ( 124) for modifying a current operating mode of a first island; receiving via the first mediation circuit (128, 132, 130) coupled to the first and second island control circuits (124, 126) a second request from the second island control circuit (126) for modify a current operating mode of a second island, wherein the first island control circuit (124) is coupled to a first island (104), the second island control circuit (126) is coupled to a first island (104), second island (106) and each of the first and second islands (104, 106) comprises a group of circuits adapted to operate in one of a plurality of modes of operation, wherein, in a first mode of operation, the circuits of the island receive a first voltage and / or a first clock signal at a first frequency and, in a second mode of operation, the circuits of the island receive a second voltage distinct from the first voltage and / or a second clock sigrtal to a second frequen this distinct from the first frequency; and controlling by the first mediation circuit (128, 132, 130) a first supply voltage supply circuit and / or a first clock generator (108, 110, 112) to provide the first or second voltage and or the first or second clock signal at the first and second islands based on the first and second requests.

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公开号 | 公开日

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FR3043476B1|2018-09-28|

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法律状态:
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2019-11-26| PLFP| Fee payment|Year of fee payment: 5 |

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2021-04-02| TP| Transmission of property|Owner name: DOLPHIN DESIGN, FR Effective date: 20210223 |

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2021-11-25| PLFP| Fee payment|Year of fee payment: 7 |

优先权:

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申请号 | 申请日 | 专利标题

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FR1560630|2015-11-05|

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FR1560630A|FR3043476B1|2015-11-05|2015-11-05|SYSTEM AND METHOD FOR FEED MANAGEMENT|FR1560630A| FR3043476B1|2015-11-05|2015-11-05|SYSTEM AND METHOD FOR FEED MANAGEMENT|

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US15/333,704| US10282214B2|2015-11-05|2016-10-25|System and method for power management of a plurality of circuit islands|

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CN201610963904.3A| CN107024962A|2015-11-05|2016-11-04|System and method for power management|